Semiconductor memory device having bit line precha

专利名称：Semiconductor memory device having bit

line precharge circuits activated by separatecontrol signals and control method for thesame

发明人：Kazumi Kojima,Yasushige Ogawa申请号：US09735481申请日：20001214公开号：US06275431B1公开日：20010814

专利附图：

摘要：In a semiconductor memory device which is intended to lower the power

consumption and raise the operation speed without increasing the circuit scale to meettrends toward the larger capacity, higher speed and, at the same time, the lower powervoltage design, the precharge circuit Prehas its bit line shorting section formed oftransistors TNA and TNB in series connection and its bit line voltage holding circuitformed of transistors TNA and TNB connected in series between the node of thetransistors TNA and TNB and a precharge voltage VPR source, with the transistors TNAand TNA and the TNB and TNB being controlled by precharge signals BRSand BRS,respectively. One of the precharge signals BRSand BRSis preset active since the formerprecharge operation cycle, the other precharge signal is activated to start the shortingoperation of a bit line pair /BL-BL, and the preset precharge signal is deactivated to endthe shorting operation.

申请人：FUJITSU LIMITED

代理机构：Arent Fox Kintner Plotkin & Kahn, PLLC

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