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TMS320x28xx,28xxxHigh-ResolutionPulse

WidthModulator(HRPWM)

ReferenceGuide

LiteratureNumber:SPRU924BApril2005–RevisedSeptember2007

SPRU924B–April2005–RevisedSeptember2007

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ContentsPreface...............................................................................................................................51Introduction................................................................................................................92OperationalDescriptionofHRPWM.............................................................................10

2.12.2

ControllingtheHRPWMCapabilities.........................................................................10ConfiguringtheHRPWM

......................................................................................12

2.3PrincipleofOperation..........................................................................................122.4ScaleFactorOptimizingSoftware(SFO)....................................................................162.5HRPWMExamplesUsingOptimizedAssemblyCode.....................................................21

3HRPWMRegisterDescriptions....................................................................................27

3.1RegisterSummary..............................................................................................273.2RegistersandFieldDescriptions.............................................................................28

AppendixARevisionHistory.............................................................................................30AppendixBSFOLibrarySoftware-SFO_TI_Build_V5.lib......................................................31

B.1SFOLibraryVersionComparison............................................................................31B.2SoftwareUsage.................................................................................................34

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TableofContents3

ListofFigures

1234567891011121314

ResolutionCalculationsforConventionallyGeneratedPWM..........................................................9OperatingLogicUsingMEP..............................................................................................10HRPWMExtensionRegistersandMemoryConfiguration............................................................11HRPWMSystemInterface................................................................................................11RequiredPWMWaveformforaRequestedDuty=40.5%...........................................................13Low%DutyCycleRangeLimitationExampleWhenPWMFrequency=1MHz.................................15High%DutyCycleRangeLimitationExamplewhenPWMFrequency=1MHz.................................16SimpleBuckControlledConverterUsingaSinglePWM.............................................................22PWMWaveformGeneratedforSimpleBuckControlledConverter.................................................22SimpleReconstructionFilterforaPWMBasedDAC.................................................................24PWMWaveformGeneratedforthePWMDACFunction.............................................................24HRPWMConfigurationRegister(HRCNFG)...........................................................................28CounterCompareAHighResolutionRegister(CMPAHR)...........................................................28TBPhaseHighResolutionRegister(TBPHSHR)......................................................................29

ListofTables

1234567891011A-1B-1B-2B-3

ResolutionforPWMandHRPWM.........................................................................................9HRPWMRegisters.........................................................................................................10RelationshipBetweenMEPSteps,PWMFrequencyandResolution...............................................12CMPAvsDuty(left),and[CMPA:CMPAHR]vsDuty(right)..........................................................13DutyCycleRangeLimitationfor3and6SYSCLK/TBCLKCycles..................................................16SFOLibraryRoutines......................................................................................................17FactorValues...............................................................................................................18RegisterDescriptions......................................................................................................27HRPWMConfigurationRegister(HRCNFG)FieldDescriptions.....................................................28CounterCompareAHighResolutionRegister(CMPAHR)FieldDescriptions....................................28TBPhaseHighResolutionRegister(TBPHSHR)FieldDescriptions...............................................29ChangesMadeinRevisionB.............................................................................................30SFOLibraryVersionComparison........................................................................................31SFOV5LibraryRoutines..................................................................................................32SoftwareFunctions.........................................................................................................34

4ListofFigures

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Preface

SPRU924B–April2005–RevisedSeptember2007

ReadThisFirstAboutThisManual

Thisdocumentdescribestheoperationofthehigh-resolutionextensiontothepulsewidthmodulator(HRPWM).

NotationalConventions

Thisdocumentusesthefollowingconventions.

•Hexadecimalnumbersareshownwiththesuffixh.Forexample,thefollowingnumberis40hexadecimal(decimal64):40h.

•Registersinthisdocumentareshowninfiguresanddescribedintables.

–Eachregisterfigureshowsarectangledividedintofieldsthatrepresentthefieldsoftheregister.Eachfieldislabeledwithitsbitname,itsbeginningandendingbitnumbersabove,anditsread/writepropertiesbelow.Alegendexplainsthenotationusedfortheproperties.

–Reservedbitsinaregisterfiguredesignateabitthatisusedforfuturedeviceexpansion.

RelatedDocumentationFromTexasInstruments

ThefollowingdocumentsdescribetheC2000™devicesandrelatedsupporttools.Copiesofthese

documentsareavailableontheInternetatwww.ti.com.Tip:Entertheliteraturenumberinthesearchboxprovidedatwww.ti.com.ThecurrentdocumentationthatdescribestheC2000devices,relatedperipherals,andothertechnicalcollateral,isavailableintheC2000DSPproductfolderat:www.ti.com/c2000.DataManuals—

SPRS230—TMS320F2809,F2808,F2806,F2802,F2801,C2802,C2801,andF2801xDSPsDataManualcontainsthepinout,signaldescriptions,aswellaselectricalandtimingspecificationsfortheF280xdevices.SPRS357—TMS320F28044DigitalSignalProcessorDataManualcontainsthepinout,signaldescriptions,aswellaselectricalandtimingspecificationsfortheF28044device.SPRS439—TMS320F28335,F28334,F28332DigitalSignalControllers(DSCs)DataManualcontainsthepinout,signaldescriptions,aswellaselectricalandtimingspecificationsfortheF2833xdevices.CPUUser'sGuides—

SPRU430—TMS320C28xDSPCPUandInstructionSetReferenceGuidedescribesthecentralprocessingunit(CPU)andtheassemblylanguageinstructionsoftheTMS320C28xfixed-pointdigitalsignalprocessors(DSPs).ItalsodescribesemulationfeaturesavailableontheseDSPs.SPRUEO2—TMS320C28xFloatingPointUnitandInstructionSetReferenceGuidedescribesthefloating-pointunitandincludestheinstructionsfortheFPU.PeripheralGuides—

SPRU566—TMS320x28xx,28xxxPeripheralReferenceGuideSPRU924B–April2005–RevisedSeptember2007SubmitDocumentationFeedback

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describestheperipheralreferenceguidesofthe28xdigitalsignalprocessors(DSPs).

SPRUFB0—TMS320x2833xSystemControlandInterruptsReferenceGuide

describesthevariousinterruptsandsystemcontrolfeaturesofthe2833xdigitalsignalcontrollers(DSCs).SPRU712—TMS320x280x,2801x,2804xSystemControlandInterruptsReferenceGuidedescribesthevariousinterruptsandsystemcontrolfeaturesofthe280xdigitalsignalprocessors(DSPs).SPRU812—TMS320x2833xAnalog-to-DigitalConverter(ADC)ReferenceGuidedescribeshowtoconfigureandusetheon-chipADCmodule,whichisa12-bitpipelinedADC.SPRU716—TMS320x280x,2801x,2804xAnalog-to-DigitalConverter(ADC)ReferenceGuidedescribeshowtoconfigureandusetheon-chipADCmodule,whichisa12-bitpipelinedADC.SPRU949—TMS320x2833xExternalMemoryInterface(XINTF)User'sGuidedescribestheXINTF,whichisanonmultiplexedasynchronousbus,asitisusedonthe2833xdevices.SPRU963—TMS320x2833xBootROMReferenceGuidedescribesthepurposeandfeaturesofthebootloader(factory-programmedboot-loadingsoftware)andprovidesexamplesofcode.Italsodescribesothercontentsofthedeviceon-chipbootROMandidentifieswherealloftheinformationislocatedwithinthatmemory.SPRU722—TMS320x280x,2801x,2804xBootROMReferenceGuidedescribesthepurposeandfeaturesofthebootloader(factory-programmedboot-loadingsoftware).Italsodescribesothercontentsofthedeviceon-chipbootROMandidentifieswherealloftheinformationislocatedwithinthatmemory.SPRUFB7—TMS320x2833xMultichannelBufferedSerialPort(McBSP)User'sGuidedescribestheMcBSPavailableontheF2833xdevices.TheMcBSPsallowdirectinterfacebetweenaDSPandotherdevicesinasystem.SPRUFB8—TMS320x2833xDirectMemoryAccess(DMA)ReferenceGuidedescribestheDMAonthe2833xdevices.

SPRU791—TMS320x28xx,28xxxEnhancedPulseWidthModulator(ePWM)ModuleReferenceGuidedescribesthemainareasoftheenhancedpulsewidthmodulatorthatincludedigitalmotorcontrol,switchmodepowersupplycontrol,UPS(uninterruptiblepowersupplies),andotherformsofpowerconversion.SPRU924—TMS320x28xx,28xxxHigh-ResolutionPulseWidthModulator(HRPWM)describestheoperationofthehigh-resolutionextensiontothepulsewidthmodulator(HRPWM).SPRU807—TMS320x28xx,28xxxEnhancedCapture(eCAP)ModuleReferenceGuidedescribestheenhancedcapturemodule.Itincludesthemoduledescriptionandregisters.

SPRU790—TMS320x28xx,28xxxEnhancedQuadratureEncoderPulse(eQEP)ReferenceGuidedescribestheeQEPmodule,whichisusedforinterfacingwithalinearorrotaryincrementalencodertogetposition,direction,andspeedinformationfromarotatingmachineinhigh

performancemotionandpositioncontrolsystems.Itincludesthemoduledescriptionandregisters.SPRU074—TMS320x28xx,28xxxEnhancedControllerAreaNetwork(eCAN)ReferenceGuidedescribestheeCANthatusesestablishedprotocoltocommunicateseriallywithothercontrollersinelectricallynoisyenvironments.SPRU051—TMS320x28xx,28xxxSerialCommunicationInterface(SCI)ReferenceGuide6ReadThisFirst

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describestheSCI,whichisatwo-wireasynchronousserialport,commonlyknownasaUART.TheSCImodulessupportdigitalcommunicationsbetweentheCPUandotherasynchronousperipheralsthatusethestandardnon-return-to-zero(NRZ)format.

SPRU059—TMS320x28xx,28xxxSerialPeripheralInterface(SPI)ReferenceGuidedescribestheSPI-ahigh-speedsynchronousserialinput/output(I/O)port-thatallowsaserialbitstreamofprogrammedlength(onetosixteenbits)tobeshiftedintoandoutofthedeviceataprogrammedbit-transferrate.SPRU721—TMS320x28xx,28xxxInter-IntegratedCircuit(I2C)ReferenceGuidedescribesthefeaturesandoperationoftheinter-integratedcircuit(I2C)modulethatisavailableontheTMS320x280xdigitalsignalprocessor(DSP).ToolsGuides—

SPRU513—TMS320C28xAssemblyLanguageToolsUser'sGuidedescribestheassemblylanguagetools(assemblerandothertoolsusedtodevelopassembly

languagecode),assemblerdirectives,macros,commonobjectfileformat,andsymbolicdebuggingdirectivesfortheTMS320C28xdevice.SPRU514—TMS320C28xOptimizingCCompilerUser'sGuidedescribestheTMS320C28x™C/C++compiler.ThiscompileracceptsANSIstandardC/C++sourcecodeandproducesTMS320DSPassemblylanguagesourcecodefortheTMS320C28xdevice.SPRU608—TheTMS320C28xInstructionSetSimulatorTechnicalOverviewdescribesthesimulator,availablewithintheCodeComposerStudioforTMS320C2000IDE,thatsimulatestheinstructionsetoftheC28x™core.SPRU625—TMS320C28xDSP/BIOSApplicationProgrammingInterface(API)ReferenceGuidedescribesdevelopmentusingDSP/BIOS.

Trademarks

C2000,TMS320C28x,C28xaretrademarksofTexasInstruments.

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ReferenceGuide

SPRU924B–April2005–RevisedSeptember2007

High-ResolutionPulseWidthModulator(HRPWM)ThisdocumentisusedinconjunctionwiththeTMS320x28xx,28xxxEnhancedPulseWidthModulator(ePWM)ModuleReferenceGuide(literaturenumberSPRU791).TheHRPWMmoduleextendsthetimeresolutioncapabilitiesoftheconventionallyderiveddigitalpulsewidthmodulator(PWM).HRPWMistypicallyusedwhenPWMresolutionfallsbelow~9-10bits.ThisoccursatPWMfrequenciesgreaterthan~200kHzwhenusingaCPU/systemclockof100MHz.ThekeyfeaturesofHRPWMare:

•Extendedtimeresolutioncapability

•Usedinbothdutycycleandphase-shiftcontrolmethods

•FinertimegranularitycontroloredgepositioningusingextensionstotheCompareAandPhaseregisters

•ImplementedusingtheAsignalpathofPWM,i.e.,ontheEPWMxAoutput.EPWMxBoutputhasconventionalPWMcapabilities

•Self-checkdiagnosticssoftwaremodetocheckifthemicroedgepositioner(MEP)logicisrunningoptimally

Topic

..................................................................................................Page

TableofContents................................................................................3Preface...............................................................................................51Introduction...............................................................................92OperationalDescriptionofHRPWM.............................................103HRPWMRegisterDescriptions...................................................27AppendixARevisionHistory.............................................................30AppendixBSFOLibrarySoftware-SFO_TI_Build_V5.lib......................318High-ResolutionPulseWidthModulator(HRPWM)

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Introduction

1Introduction

TheePWMperipheralisusedtoperformafunctionthatismathematicallyequivalenttoadigital-to-analogconverter(DAC).AsshowninFigure1,whereTSYSCLKOUT=10ns(i.e.100MHzclock),theeffective

resolutionforconventionallygeneratedPWMisafunctionofPWMfrequency(orperiod)andsystemclockfrequency.

Figure1.ResolutionCalculationsforConventionallyGeneratedPWM

TPWMPWM

TSYSCLKPWM󰀀resolution󰀀(%)󰀀=󰀀FPWM/FSYSCLKOUTx󰀀100%PWM󰀀resolution󰀀(bits)󰀀=󰀀Log2(FPWM/FSYSCLKOUT)

IftherequiredPWMoperatingfrequencydoesnotoffersufficientresolutioninPWMmode,youmaywanttoconsiderHRPWM.AsanexampleofimprovedperformanceofferedbyHRPWM,Table1showsresolutioninbitsforvariousPWMfrequencies.Table1valuesassumeaMEPstepsizeof180ps.SeethedevicedatasheetfortypicalandmaximumperformancespecificationsfortheMEP.

Table1.ResolutionforPWMandHRPWM

PWMFreq(kHz)2050100150200250500100015002000

RegularResolution(PWM)Bits12.311.010.09.49.08.67.66.66.15.6

%0.00.00.10.20.20.30.51.01.52.0

HighResolution(HRPWM)Bits18.116.815.815.214.814.413.812.411.911.4

%0.0000.0010.0020.0030.0040.0050.0070.0180.0270.036

Althougheachapplicationmaydiffer,typicallowfrequencyPWMoperation(below250kHz)maynotrequireHRPWM.HRPWMcapabilityismostusefulforhighfrequencyPWMrequirementsofpowerconversiontopologiessuchas:

•Single-phasebuck,boost,andflyback•Multi-phasebuck,boost,andflyback•Phase-shiftedfullbridge

•DirectmodulationofD-Classpoweramplifiers

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OperationalDescriptionofHRPWM

2OperationalDescriptionofHRPWM

TheHRPWMisbasedonmicroedgepositioner(MEP)technology.MEPlogiciscapableofpositioninganedgeveryfinelybysub-dividingonecoarsesystemclockofaconventionalPWMgenerator.Thetimestepaccuracyisontheorderof150ps.TheHRPWMalsohasaself-checksoftwarediagnosticsmodeto

checkiftheMEPlogicisrunningoptimally,underalloperatingconditions.DetailsonsoftwarediagnosticsandfunctionsareinSection2.4.Figure2showstherelationshipbetweenonecoarsesystemclockandedgepositionintermsofMEPsteps,whicharecontrolledviaan8-bitfieldintheCompareAextensionregister(CMPAHR).

Figure2.OperatingLogicUsingMEP

PWM period (N CPU cycles)

PWM duty

(0 to 1.0 in Q15 format)

MEP scale factorNumber of MEP stepsin one coarse step

MEP stepCoarse step size@ 100 MHz CPU frequency = 10 nsNumber of coarse steps= integer(PWMduty * PWMperiod)Number of MEP steps= fraction(PWMduty * PWMperiod) * (MEPScaleFactor)16−bit CMPA register value16−bit CMPAHR register value

†

= number of coarse steps

= (number of MEP steps) << 8 + 0x180 (rounding)†

For MEP range and rounding adjustment.

TogenerateanHRPWMwaveform,configuretheTBM,CCM,andAQMregistersasyouwouldtogenerateaconventionalPWMofagivenfrequencyandpolarity.TheHRPWMworkstogetherwiththeTBM,CCM,andAQMregisterstoextendedgeresolution,andshouldbeconfiguredaccordingly.Althoughmanyprogrammingcombinationsarepossible,onlyafewareneededandpractical.ThesemethodsaredescribedinSection2.5.RegistersdiscussedbutnotfoundinthisdocumentcanbeseeninTMS320x28xx,28xxxEnhancedPulseWidthModulator(ePWM)ModuleReferenceGuide(literaturenumberSPRU791).TheHRPWMoperationiscontrolledandmonitoredusingthefollowingregisters:

Table2.HRPWMRegisters

mnemonicTBPHSHRCMPAHRHRCNFG(1)

(1)

AddressOffset

0x00020x00080x0020

Shadowed

NoYesNo

Description

ExtensionRegisterforHRPWMPhase(8bits)ExtensionRegisterforHRPWMDuty(8bits)HRPWMConfigurationRegister

ThisregisterisEALLOWprotected.

2.1ControllingtheHRPWMCapabilities

TheMEPoftheHRPWMiscontrolledbytwoextensionregisters,each8-bitswide.ThesetwoHRPWMregistersareconcatenatedwiththe16-bitTBPHSandCMPAregistersusedtocontrolPWMoperation.•TBPHSHR-TimeBasePhaseHighResolutionRegister•CMPAHR-CounterCompareAHighResolutionRegister

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OperationalDescriptionofHRPWM

Figure3.HRPWMExtensionRegistersandMemoryConfiguration

0x00020x0003

TBPHSHR (8)Reserved (8)

TBPHS (16)

Single 32 bit write

0x00080x0009

CMPAHR (8)

Reserved (8)

CMPA (16)

Single 32 bit write

1615

TBPHS (16)

1615

TBPHSHR (8)Reserved (8)

CMPAHR (8)Reserved (8)

HRPWMcapabilitiesarecontrolledusingtheChannelAPWMsignalpath.Figure4showshowtheHRPWMinterfaceswiththe8-bitextensionregisters.

Figure4.HRPWMSystemInterface

Time−base (TB)CTR=ZEROCTR=CMPBDisabledCTR=PRDTBCTL[CNTLDE]Counterup/down(16 bit)TBCNTactive (16)168PhasecontrolCTR = PRDCTR = ZEROCTR = CMPACTR = CMPBCTR_DirEventtriggerandinterrupt(ET)EPWMxINTEPWMxSOCAEPWMxSOCBEPWMxSYNCI

CTR=ZEROCTR_DirTBPHSHR (8)TBCTL[SWFSYNC](software forced sync)Syncin/outselectMuxTBPRD shadow (16)TBPRD active (16)EPWMxSYNCO

TBCTL[SYNCOSEL]TBPHS active (24)Counter compare (CC)CTR=CMPACMPAHR (8)168CMPA active (24)Actionqualifier(AQ)HiRes PWM (HRPWM)EPWMAEPWMxA

CMPA shadow (24)CTR=CMPB16EPWMBCMPB active (16)CMPB shadow (16)CTR = ZERODeadband(DB)PWMchopper(PC)Tripzone(TZ)EPWMxBEPWMxTZINTTZ1 to TZ6SPRU924B–April2005–RevisedSeptember2007SubmitDocumentationFeedback

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OperationalDescriptionofHRPWM

2.2ConfiguringtheHRPWM

OncetheePWMhasbeenconfiguredtoprovideconventionalPWMofagivenfrequencyandpolarity,theHRPWMisconfiguredbyprogrammingtheHRCNFGregisterlocatedatoffsetaddress20h.Thisregisterprovidesconfigurationoptionsforthefollowingkeyoperatingmodes:

EdgeMode—TheMEPcanbeprogrammedtoprovideprecisepositioncontrolontherisingedge(RE),

fallingedge(FE)orbothedges(BE)atthesametime.FEandREareusedforpowertopologiesrequiringdutycyclecontrol,whileBEisusedfortopologiesrequiringphaseshifting,e.g.,phaseshiftedfullbridge.ControlMode—TheMEPisprogrammedtobecontrolledeitherfromtheCMPAHRregister(dutycycle

control)ortheTBPHSHRregister(phasecontrol).REorFEcontrolmodeshouldbeusedwithCMPAHRregister.BEcontrolmodeshouldbeusedwithTBPHSHRregister.ShadowMode—Thismodeprovidesthesameshadowing(doublebuffering)optionasinregularPWM

mode.ThisoptionisvalidonlywhenoperatingfromtheCMPAHRregisterandshouldbechosentobethesameastheregularloadoptionfortheCMPAregister.IfTBPHSHRisused,thenthisoptionhasnoeffect.

2.3PrincipleofOperation

TheMEPlogiciscapableofplacinganedgeinoneof255(8bits)discretetimesteps,eachofwhichhasatimeresolutionontheorderof150ps.TheMEPworkswiththeTBMandCCMregisterstobecertainthattimestepsareoptimallyappliedandthatedgeplacementaccuracyismaintainedoverawiderangeofPWMfrequencies,systemclockfrequenciesandotheroperatingconditions.Table3showsthetypicalrangeofoperatingfrequenciessupportedbytheHRPWM.

Table3.RelationshipBetweenMEPSteps,PWMFrequencyandResolution

System(MHz)50.060.070.080.090.0100.0

(1)(2)(3)(4)(5)

MEPStepsPerSYSCLKOUT(1)(2)(3)

1119379696256

PWMMIN(Hz)(4)

7639161068122113731526

PWMMAX(MHz)

2.503.003.504.004.505.00

Res.@MAX(Bits)(5)

11.110.910.610.410.310.1

Systemfrequency=SYSCLKOUT,i.e.CPUclock.TBCLK=SYSCLKOUT.

TabledatabasedonaMEPtimeresolutionof180ps(thisisanexamplevalue,seetheTMS320F2808,TMS320F2806,TMS320F2801DigitalSignalProcessorsDataManual[literaturenumberSPRS230]).MEPstepsapplied=TSYSCLKOUT/180psinthisexample.

PWMminimumfrequencyisbasedonamaximumperiodvalue,i.e.TBPRD=65535.PWMmodeisasymmetricalup-count.ResolutioninbitsisgivenforthemaximumPWMfrequencystated.

2.3.1EdgePositioning

Inatypicalpowercontrolloop(e.g.,switchmodes,digitalmotorcontrol[DMC],uninterruptiblepowersupply[UPS]),adigitalcontroller(PID,2pole/2zero,lag/lead,etc.)issuesadutycommand,usually

expressedinaperunitorpercentageterms.Assumethatforaparticularoperatingpoint,thedemandeddutycycleis0.405or40.5%ontimeandtherequiredconverterPWMfrequencyis1.25MHz.In

conventionalPWMgenerationwithasystemclockof100MHz,thedutycyclechoicesareinthevicinityof40.5%.InFigure5,acomparevalueof32counts(i.e.duty=40%)istheclosestto40.5%thatyoucanattain.Thisisequivalenttoanedgepositionof320nsinsteadofthedesired324ns.ThisdataisshowninTable4.ByutilizingtheMEP,youcanachieveanedgepositionmuchclosertothedesiredpointof324ns.

Table4showsthatinadditiontotheCMPAvalue,22stepsoftheMEP(CMPAHRregister)willpositiontheedgeat323.96ns,resultinginalmostzeroerror.Inthisexample,itisassumedthattheMEPhasastepresolutionof180ns.

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OperationalDescriptionofHRPWM

Figure5.RequiredPWMWaveformforaRequestedDuty=40.5%

Tpwm = 800 ns324 nsDemandedduty (40.5%)

10 ns steps0EPWM1A

30313233347937.5%40.0%42.5%38.8%41.3%Table4.CMPAvsDuty(left),and[CMPA:CMPAHR]vsDuty(right)

CMPA(count)(1)(2)(3)

DUTY%35.036.337.538.840.041.342.5

HighTime(ns)280290300310320330340

CMPA(count)3232323232323232

Required32.40

(1)(2)(3)

CMPAHR(count)

18192021222324252627

Duty(%)40.40540.42840.45040.47340.49540.51840.54040.56340.58540.608

HighTime(ns)323.24323.42323.60323.78323.96324.14324.32324.50324.68324.86

28293031323334

40.5

324

Systemclock,SYSCLKOUTandTBCLK=100MHz,10ns

ForaPWMPeriodregistervalueof80counts,PWMPeriod=80x10ns=800ns,PWMfrequency=1/800ns=1.25MHzAssumedMEPstepsizefortheaboveexample=180ps

SeetheTMS320F2808,TMS320F2806,TMS320F2801/UCD9501DigitalSignalProcessorsDataManual(literaturenumberSPRS230)fortypicalandmaximumMEPvalues.

2.3.2ScalingConsiderations

Themechanicsofhowtopositionanedgepreciselyintimehasbeendemonstratedusingtheresourcesofthestandard(CMPA)andMEP(CMPAHR)registers.Inapracticalapplication,however,itisnecessarytoseamlesslyprovidetheCPUamappingfunctionfromaper-unit(fractional)dutycycletoafinalinteger(non-fractional)representationthatiswrittentothe[CMPA:CMPAHR]registercombination.

Todothis,firstexaminethescalingormappingstepsinvolved.Itiscommonincontrolsoftwaretoexpressdutycycleinaper-unitorpercentagebasis.Thishastheadvantageofperformingallneededmathcalculationswithoutconcernforthefinalabsolutedutycycle,expressedinclockcountsorhightimeinns.Furthermore,itmakesthecodemoretransportableacrossmultipleconvertertypesrunningdifferentPWMfrequencies.

Toimplementthemappingscheme,atwo-stepscalingprocedureisrequired.

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OperationalDescriptionofHRPWM

Assumptionsforthisexample:Systemclock,SYSCLKOUTPWMfrequency

RequiredPWMdutycycle,PWMDutyPWMperiodintermsofcoarsesteps,PWMperiod(800ns/10ns)

NumberofMEPstepspercoarsestepat180ps(10ns/180ps),MEP_SFValuetokeepCMPAHRwithintherangeof1-255andfractionalroundingconstant(defaultvalue)

=10ns(100MHz)=1.25MHz(1/800ns)=0.405(40.5%)=80=55

=0180h

Step1:PercentageIntegerDutyvalueconversionforCMPAregisterCMPAregistervalue

=int(PWMDuty*PWMperiod);intmeansintegerpart=int(0.405*80)=int(32.4)

CMPAregistervalue

=32(20h)

Step2:FractionalvalueconversionforCMPAHRregisterCMPAHRregistervalue

=(frac(PWMDuty*PWMperiod)*MEP_SF)<<8)+0180h;fracmeansfractionalpart=(frac(32.4)*55<<8)+0180h;ShiftistomovethevalueasCMPAHRhighbyte=((0.4*55)<<8)+0180h=(22<<8)+0180h

=22*256+0180h;Shiftingleftby8isthesamemultiplyingby256.=5632+0180h=1600h+0180h

CMPAHRvalue

=1780h;CMPAHRvalue=1700h,lower8bitswillbeignoredbyhardware.

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OperationalDescriptionofHRPWM

Note:

TheMEPscalefactor(MEP_SF)varieswiththesystemclockandDSPoperating

conditions.TIprovidesanMEPscalefactoroptimizing(SFO)softwareCfunction,whichusesthebuiltindiagnosticsineachHRPWMandreturnsthebestscalefactorforagivenoperatingpoint.

ThescalefactorvariesslowlyoveralimitedrangesotheoptimizingCfunctioncanberunveryslowlyinabackgroundloop.

TheCMPAandCMPAHRregistersareconfiguredinmemorysothatthe32-bitdatacapabilityofthe280xCPUcanwritethisasasingleconcatenatedvalue,i.e.[CMPA:CMPAHR].

ThemappingschemehasbeenimplementedinbothCandassembly,asshownin

Section2.5.Theactualimplementationtakesadvantageofthe32-bitCPUarchitectureofthe28xx,andissomewhatdifferentfromthestepsshowninSection2.3.1.Fortimecriticalcontrolloopswhereeverycyclecounts,theassemblyversionis

recommended.Thisisacycleoptimizedfunction(11SYSCLKOUTcycles)thattakesaQ15dutyvalueasinputandwritesasingle[CMPA:CMPAHR]value.

2.3.3DutyCycleRangeLimitation

Inhighresolutionmode,theMEPisnotactivefor100%ofthePWMperiod.Itbecomesoperational:•3SYSCLKcyclesaftertheperiodstartswhendiagnosticsaredisabled•6SYSCLKcyclesaftertheperiodstartswhenSFOdiagnosticsarerunning

DutycyclerangelimitationsareillustratedinFigure6.ThislimitationimposesalowerdutycyclelimitontheMEP.Forexample,precisionedgecontrolisnotavailableallthewaydownto0%dutycycle.Althoughforthefirst3or6cycles,theHRPWMcapabilitiesarenotavailable,regularPWMdutycontrolisstillfullyoperationaldownto0%duty.Inmostapplicationsthisshouldnotbeanissueasthecontrollerregulationpointisusuallynotdesignedtobecloseto0%dutycycle.Tobetterunderstandtheuseabledutycyclerange,seeTable5.Figure6.Low%DutyCycleRangeLimitationExampleWhenPWMFrequency=1MHz

60󰀀ns30󰀀nsTPWM=󰀀1000󰀀ns(FPWM=󰀀1󰀀MHz)SYSCLKOUT=TBCLK󰀀=100󰀀MHz0EPWM1A36100SPRU924B–April2005–RevisedSeptember2007SubmitDocumentationFeedback

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OperationalDescriptionofHRPWM

Table5.DutyCycleRangeLimitationfor3and6SYSCLK/TBCLKCycles

PWMFrequency(1)

(kHz)

200400600800100012001400160018002000

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3CyclesMinimumDuty

0.6%1.2%1.8%2.4%3.0%3.6%4.2%4.8%5.4%6.0%

6CyclesMinimumDuty

1.4%2.8%4.2%5.6%7.0%8.4%9.8%11.2%12.6%14.0%

Systemclock-TSYSCLKOUT=10nsSystemclock=TBCLK=100MHz

IftheapplicationdemandsHRPWMoperationinthelowpercentdutycycleregion,thentheHRPWMcanbeconfiguredtooperateincount-downmodewiththerisingedgeposition(REP)controlledbytheMEP.ThisisillustratedinFigure7.Inthiscaselowpercentdutylimitationisnolongeranissue.However,therewillbeamaximumdutylimitationwithsamepercentnumbersasgiveninTable5.Figure7.High%DutyCycleRangeLimitationExamplewhenPWMFrequency=1MHz

60 ns30 ns

Tpwm = 1000 ns(Fpwm = 1 MHz)SYSCLKOUT = 100 MHz036100EPWM1A2.4ScaleFactorOptimizingSoftware(SFO)

Themicroedgepositioner(MEP)logiciscapableofplacinganedgeinoneof255discretetimesteps.Aspreviouslymentioned,thesizeofthesestepsisontheorderof150ps.TheMEPstepsizevariesbasedonworst-caseprocessparameters,operatingtemperature,andvoltage.MEPstepsizeincreaseswithdecreasingvoltageandincreasingtemperatureanddecreaseswithincreasingvoltageanddecreasingtemperature.ApplicationsthatusetheHRPWMfeatureshouldusetheTI-suppliedMEPscalefactoroptimizer(SFO)softwarefunctions.SFOfunctionshelptodynamicallydeterminethenumberofMEPstepsperSYSCLKOUTperiodwhiletheHRPWMisinoperation.

ToutilizetheMEPcapabilitieseffectivelyduringtheQ15dutyto[CMPA:CMPAHR]mappingfunction(seeSection2.3.2),thecorrectvaluefortheMEPscalingfactor(MEP_SF)needstobeknownbythesoftware.Toaccomplishthis,eachHRPWMmodulehasbuiltinself-checkanddiagnosticscapabilitiesthatcanbeusedtodeterminetheoptimumMEP_SFvalueforanyoperatingcondition.TIprovidesaC-callablelibrarycontainingtwoSFOfunctionsthatutilizethishardwareanddeterminetheoptimumMEP_SF.Assuch,MEPControlandDiagnosticsregistersarereservedforTIuse.

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OperationalDescriptionofHRPWM

Currently,therearetworeleasedversionsoftheSFOlibrary-SFO_TI_Build.libandSFO_TI_Build_V5.lib.Versions2,3,and4wereTIInternalonly.AdetaileddescriptionoftheSFO_TI_Build.libsoftware

functionsfollowsbelow.InformationontheSFO_TI_Build_V5.libsoftwarefunctions,whichsupportupto16HRPWMchannels,canbefoundinAppendixB,alongwithahigh-levelcomparisontablebetweenthetwolibraryversions.

Note:

FortheF2833xfloatingpointdevices,whencompilingapplicationcodeforfloatingpoint(fpu32mode),librariesutilizedbytheapplicationcodemustalsobecompiledforfloatingpoint.TheSFO_TI_Build_fpu.libandSFO_TI_Build_V5_fpu.libareavailableasthefloatingpointcompiledequivalentstothefixedpointSFO_TI_Build.liband

SFO_TI_Build_V5.liblibraries.TheSFOfunctionsinthefpu-versionlibrariesareC-code-compatibletotheirfixed-pointequivalents.

Table6providesfunctionaldescriptionsofthetwoSFOlibraryroutinesinSFO_TI_Build.lib.

Table6.SFOLibraryRoutines

Function

Description

Thisroutinerunsfaster,asthecalibrationlogicworkswhenHRPWMcapabilitiesaredisabled;therefore,HRPWMcapabilitiescannotberunconcurrentlywhentheePWMnisbeingused.IfSYSCLKOUT=TBCLK=100MHzandassumingMEPstepssizeis150psTypicalvalueat100MHz=66MEPstepsperunitTBCLK(10ns)Thefunctionreturnsavalueinthevariablearray:

MEP_ScaleFactor[n]=NumberofMEPsteps/SYSCLKOUT

IfTBCLKisnotequaltoSYSCLKOUT,thenthereturnedvaluemustbeadjustedtoreflectthecorrectTBCLK:

MEPstepsperTBCLK=MEP_ScaleFactor[n]*(SYSCLKOUT/TBCLK)(1)

Example:IfTBCLK=SYSCLKOUT/2,

MEPstepsperTBCLK=MEP_ScaleFactor[n]*(100/50)=66*2=132

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SFO_MepDis(n)ScaleFactorOptimizerwithMEPDisabled

Constraintswhenusingthisfunction:

SFO_MepDis(n)canbeusedwithSYSCLKOUTfrom50MHzto100MHz(ormaximumSYSCLKfrequency).MEPdiagnosticslogicusesSYSCLKOUTnotTBCLKandhenceSYSCLKOUTrestrictionisanimportantconstraint.SFO_MepDis(n)functiondoesnotrequireastartingScaleFactorvalue.Whentouse

IfoneoftheePWMmodulesisnotusedinHRPWMmode,thenitcanbededicatedtoruntheSFOdiagnosticsforthemodulesthatarerunningHRPWMmode.HerethesingleMEP_SFvalueobtainedcanbeappliedtootherePWMmodules.ThisassumesthatallHRPWMmodule’sMEPstepsaresimilarbutmaynotbeidentical.TheePWMmodulethatisnotactiveinHRPWMmodeisstillfullyoperationalinconventionalPWMmodeandcanbeusedtodrivePWMpins.TheSFOfunctiononlymakesuseoftheMEPdiagnosticslogic.TheotherePWMmodulesoperatinginHRPWMmodeincuronlya3-cycleminimumdutylimitation.

SFO_MepEn(n)

ScaleFactorOptimizerwithMEPEnabled

ThisroutinerunsslowerasthecalibrationlogicisusedconcurrentlywhileHRPWMcapabilitiesarebeingusedbytheePWMmodule.

IfSYSCLKOUT=TBCLK=100MHzandassumingMEPstepssizeis150psTypicalvalueat100MHz=66MEPstepsperunitTBCLK(10ns)Thefunctionreturnsavalueinthevariablearray:

MEP_ScaleFactor[n](1)

=NumberofMEPsteps/SYSCLKOUT=NumberofMEPsteps/TBCLK

Constraintswhenusingthisfunction:

SFO_MepEn(n)functionisrestrictedtobeusedwithSYSCLKOUTof60MHz-100MHz(ormaximumSYSCLKfrequency).MEPdiagnosticslogicusesSYSCLKOUTnotTBCLKandhenceSYSCLKOUTrestrictionisanimportantconstraint.SFO_MepEn(n)functiondoesrequireastartingScaleFactorvalue.MEP_ScaleFactor[0]needstobeinitializedtoatypicalMEPstepsizevalueWhentouse

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nistheePWMmodulenumberonwhichtheSFOfunctionoperates.

e.g.,n=1,2,3,or4fortheF2808.Checkyourdevicedatamanualfordeviceconfigurations.

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OperationalDescriptionofHRPWM

Table6.SFOLibraryRoutines(continued)

Function

Description

IftheapplicationrequiresallePWMmodulestohaveHRPWMcapability(i.e.,MEPisoperational),thentheSFO_MepEn(n)functionshouldrunforeachoftheactiveePWMmoduleswithHRPWMcapability.

•Intheabovecase,a6-cycleMEPinactivityzoneexistsatthestartofthePWMperiod.SeeSection2.3.3ondutycyclerangelimitation.

•IfallePWMmodulesareusingthesameTBCLKprescaler,thenitisalsopossibletorunthe

SFO_MepEn(n)functionforonlyoneePWMmoduleandtousetheSFOreturnvaluefortheother

modules.InthiscaseonlyoneePWMmoduleincursthe6-cyclelimitation,andremainingmodulesincuronlya3-cycleminimumdutylimitation.See“Dutycyclelimitation”section.ThisassumesthatallHRPWMmodule’sMEPstepsaresimilarbutmaynotbeidentical.

BothroutinescanberunasbackgroundtasksinaslowlooprequiringnegligibleCPUcycles.Inmostapplicationsonlyoneoftheseroutineswillbeneeded.However,iftheapplicationhasfreeHRPWM

resourcesthenboththeroutinescouldbeused.TherepetitionrateatwhichanSFOfunctionneedstobeexecuteddependsontheapplicationsoperatingenvironment.AswithalldigitalCMOSdevicestemperatureandsupplyvoltagevariationshaveaneffectonMEPoperation.However,inmost

applicationstheseparametersvaryslowlyandthereforeitisoftensufficienttoexecutetheSFOfunctiononceevery5to10secondsorso.Ifmorerapidvariationsareexpected,thenexecutionmayhavetobeperformedmorefrequentlytomatchtheapplication.Note,thereisnohighlimitrestrictionontheSFOfunctionrepetitionrate,henceitcanexecuteasquicklyasthebackgroundloopiscapable.

WhileusingHRPWMfeaturewithnoSFOdiagnostics,HRPWMlogicwillnotbeactiveforthefirst3TBCLKcyclesofthePWMperiod.Whilerunningtheapplicationinthisconfiguration,ifCMPAregistervalueislessthan3cycles,thenitsCMPAHRregistermustbeclearedtozero.ThiswouldavoidanyunexpectedtransitionsonPWMsignal.

However,ifSFOdiagnosticfunctionSFO_MepEnisusedinthebackground,thenHRPWMlogicwillnotbeactiveforthefirst6TBCLKcyclesofPWMperiod.WhileusingSFO_MepEnfunctionifCMPAregistervalueislessthan6cycles,thenitsCMPAHRregistermustbeclearedtozero.ThiswouldavoidanyunexpectedtransitionsonPWMsignal.AlsonotethattheSFO_MepDisfunctioncannotbeusedconcurrentlywithPWMsignalswithHRPWMenabled(seetheprevioussectionfordetails).

2.4.1SoftwareUsage

SoftwarelibraryfunctionsSFO_MepEn(intn)andSFO_MepDis(intn)calculatetheMEPscalefactorforePWMnmodules,wheren=1,2,3,or4.Thescalefactorisanintegervalueintherange1–255,andrepresentsthenumberofmicrostepedgepositionsavailableforasystemclockperiod.Thescalefactorvalueisreturnedinanarrayofintegervariablesoflength5calledMEP_ScaleFactor[5].Forexample,seeTable7.Table7.FactorValues

SoftwarefunctioncallsSFO_MepDis(n)SFO_MepDis(1);SFO_MepDis(2);SFO_MepDis(3);SFO_MepDis(4);SFO_MepEn(n)SFO_MepEn(1);SFO_MepEn(2);SFO_MepEn(3);SFO_MepEn(4);

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Functionaldescription

UpdatedVariable

MEP_ScaleFactor[5](1)MEP_ScaleFactor[1]MEP_ScaleFactor[2]MEP_ScaleFactor[3]MEP_ScaleFactor[4]

Returnsthescalefactorvaluetoarrayindex1Returnsthescalefactorvaluetoarrayindex2Returnsthescalefactorvaluetoarrayindex3Returnsthescalefactorvaluetoarrayindex4

MEP_ScaleFactor[1]MEP_ScaleFactor[2]MEP_ScaleFactor[3]MEP_ScaleFactor[4]

MEP_ScaleFactor[0]variableisastartingvalueandusedbytheSFOsoftwarefunctionsinternally

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OperationalDescriptionofHRPWM

TousetheHRPWMfeatureoftheePWMsitisrecommendedthattheSFOfunctionsbeusedasdescribedhere.

Step1.AddIncludeFiles

TheSFO.hfileneedstobeincludedasfollows.ThisincludefileismandatorywhileusingtheSFOlibraryfunction.FortheTMS320F280xdevices,theC280xC/C++HeaderFilesandPeripheralExamples

(literaturenumberSPRC191).DSP280x_Device.handDSP280x_PWM_defines.harenecessaryastheyareusedwithallTIsoftwareexamples.Theseincludefilesareoptionalifcustomizedheaderfilesareusedintheendapplications.

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OperationalDescriptionofHRPWM

Example1.ASampleofHowtoAddIncludeFiles

#include\"DSP280x_Device.h\"

#include\"DSP280x_EPWM_defines.h\"#include\"SFO.h\"

//DSP280xHeaderfile//initdefines

//SFOlibfunctions(neededforHRPWM)

Step2.ElementDeclaration

Declarea5-elementarrayofintegervariablesasfollows:Example2.DeclaringanElement

intMEP_ScaleFactor[5]={0,0,0,0,0};//ScalefactorvaluesforePWM1-4intMEP_SF1,MEP_SF2,MEP_SF3,MEP_SF4

volatilestructEPWM_REGS*ePWM[]={&EPwm1Regs,&EPwm1Regs,&EPwm2Regs,&EPwm3Regs,&EPwm4Regs};

Step3.MEP_ScaleFactorInitialization

Afterpowerup,theSFO_MepEn(n)functionneedsastartingScaleFactorvalue.Thisvaluecanbe

convenientlydeterminedbyusingoneoftheePWMmodulestoruntheSFO_MepDis(n)functionpriortoconfiguringitsPWMoutputsfortheapplication.SFO_MepDis(n)functiondoesnotrequireastartingScaleFactorvalue.

Aspartoftheone-timeinitializationcode,includethefollowing:Example3.InitializingWithaScaleFactorValue

//whilewhilewhilewhile////

MEP_ScaleFactorvariablesinitializedusingfunction(MEP_ScaleFactor[1]==0)SFO_MepDis(1);//SFOfor(MEP_ScaleFactor[2]==0)SFO_MepDis(2);//SFOfor(MEP_ScaleFactor[3]==0)SFO_MepDis(3);//SFOfor(MEP_ScaleFactor[4]==0)SFO_MepDis(4);//SFOfor

SFO_MepDis

HRPWM1HRPWM2HRPWM3HRPWM4

InitializeacommonseedvariableMEP_ScaleFactor[0]requiredforallSFOfunctions

MEP_ScaleFactor[0]=MEP_ScaleFactor[1];//CommonvariableforSFOMepEN(n)function

Step4.ApplicationCode

Whiletheapplicationisrunning,fluctuationsinbothdevicetemperatureandsupplyvoltagemaybe

expected.TobesurethatoptimalScaleFactorsareusedforeachePWMmodule,theSFOfunctionshouldbere-runperiodicallyaspartofaslowerback-groundloop.Someexamplesofthisareshownhere.

Note:

SeetheHRPWM_SFOexampleintheC280xC/C++HeaderFilesandPeripheralExamples(SPRC191)availablefromtheTIwebsite.

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OperationalDescriptionofHRPWM

Example4.SFOFunctionCalls

main(){

Usercode

//Case1:ePWM1,2,3,4arerunninginHRPWMmode

SFO_MepEn(1);//EachoftheseoffunctionenablesSFO_MepEn(2);//therespectiveMEPdiagnosticlogic

SFO_MepEn(3);SFO_MepEn(4);

//andreturnsMEPScalefactorvalue

MEP_SF1MEP_SF2MEP_SF3MEP_SF4====MEP_ScaleFactor[1];MEP_ScaleFactor[2];MEP_ScaleFactor[3];MEP_ScaleFactor[4];////////usedusedusedusedforforforforePWM1ePWM2ePWM3ePWM4

//Case2:ePWM1,2,3onlyarerunninginHRPWMmode.

OneoftheePWMchannel(asanexampleePWM4)isusedasforScalefactorcalibration//////////

Hereminimumdutycyclelimitationis3clockcycles.

HRPWM4MEPdiagnosticscircuitisusedtoestimatetheMEPstepswiththeassumptionthatallHRPWMchannelsbehavesimilarlythoughmaynotbeidentical.SFO_MepDis(4);

MEP_SF1=MEP_ScaleFactor[4];MEP_SF2=MEP_SF1MEP_SF3=MEP_SF1MEP_SF4=MEP_SF1

}

//////////

MEPstepsusingePWM4usedforePWM1usedforePWM2usedforePWM3usedforePWM4

2.5HRPWMExamplesUsingOptimizedAssemblyCode.

ThebestwaytounderstandhowtousetheHRPWMcapabilitiesisthrough2realexamples:1.SimplebuckconverterusingasymmetricalPWM(i.e.count-up)withactivehighpolarity.2.DACfunctionusingsimpleR+Creconstructionfilter.

ThefollowingexamplesallhaveInitialization/configurationcodewritteninC.Tomaketheseeasiertounderstand,the#definesshownbelowareused.Note,#definesintroducedinTMS320x280xEnhancedPulseWidthModulator(ePWM)ModuleReferenceGuide(literaturenumberSPRU791)arealsoused.Example5ThisexampleassumesMEPstepsizeof150psanddoesnotusetheSFOlibrary.

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OperationalDescriptionofHRPWM

Example5.#DefinesforHRPWMHeaderFiles

//--------------------------------//HRPWM(HighResolutionPWM)

//================================//HRCNFG

#defineHR_Disable0x0#defineHR_REP0x1//RisingEdgeposition#defineHR_FEP0x2//FallingEdgeposition#defineHR_BEP0x3//BothEdgeposition#defineHR_CMP0x0//CMPAHRcontrolled#defineHR_PHS0x1//TBPHSHRcontrolled#defineHR_CTR_ZERO0x0//CTR=Zeroevent#defineHR_CTR_PRD0x1//CTR=Periodevent

2.5.1ImplementingaSimpleBuckConverter

Inthisexample,thePWMrequirementsare:

•PWMfrequency=1MHz(i.e.,TBPRD=100)•PWMmode=asymmetrical,up-count

•Resolution=12.7bits(withaMEPstepsizeof150ps)

Figure8andFigure9showtherequiredPWMwaveform.Asexplainedpreviously,configurationfortheePWM1moduleisalmostidenticaltothenormalcaseexceptthattheappropriateMEPoptionsneedtobeenabled/selected.

Figure8.SimpleBuckControlledConverterUsingaSinglePWM

Vin1

BuckEPWM1A

Vout1

Figure9.PWMWaveformGeneratedforSimpleBuckControlledConverter

Tpwrr = 1 µs

ZCAZCAZEPWM1A

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OperationalDescriptionofHRPWM

Theexamplecodeshownconsistsoftwomainparts:•Initializationcode(executedonce)

•Runtimecode(typicallyexecutedwithinanISR)

Example6showstheInitializationcode.ThefirstpartisconfiguredforconventionalPWM.ThesecondpartsetsuptheHRPWMresources.

ThisexampleassumesMEPstepsizeof150psanddoesnotusetheSFOlibrary.Example6.HRPWMBuckConverterInitializationCode

voidHrBuckDrvCnf(void){

//ConfigforconventionalPWMfirst

EPwm1Regs.TBCTL.bit.PRDLD=TB_IMMEDIATE;//setImmediateloadEPwm1Regs.TBPRD=100;//Periodsetfor1000kHzPWMhrbuck_period=200;//2xPeriod,forQ15toQ0scalingEPwm1Regs.TBCTL.bit.CTRMODE=TB_COUNT_UP;EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE;//EPWM1istheMasterEPwm1Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_DISABLE;EPwm1Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_DISABLE;EPwm1Regs.TBCTL.bit.HSPCLKDIV=TB_DIV1;EPwm1Regs.TBCTL.bit.CLKDIV=TB_DIV1;

//Note:ChBisinitializedhereonlyforcomparisonpurposes,itisnotrequiredEPwm1Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;

EPwm1Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;//optionalEPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;//optionalEPwm1Regs.AQCTLA.bit.ZRO=AQ_SET;EPwm1Regs.AQCTLA.bit.CAU=AQ_CLEAR;EPwm1Regs.AQCTLB.bit.ZRO=AQ_SET;//optionalEPwm1Regs.AQCTLB.bit.CBU=AQ_CLEAR;//optional//NowconfiguretheHRPWMresourcesEALLOW;//Notetheseregistersareprotected

//andactonlyonChA

EPwm1Regs.HRCNFG.all=0x0;//clearallbitsfirstEPwm1Regs.HRCNFG.bit.EDGMODE=HR_FEP;//ControlFallingEdgePositionEPwm1Regs.HRCNFG.bit.CTLMODE=HR_CMP;//CMPAHRcontrolstheMEPEPwm1Regs.HRCNFG.bit.HRLOAD=HR_CTR_ZERO;//ShadowloadonCTR=ZeroEDIS;

MEP_SF=66*256;//StartwithtypicalScaleFactor

//valuefor100MHz

//Note:UseSFOfunctionstoupdateMEP_SFdynamically

}

Example7showsanassemblyexampleofrun-timecodefortheHRPWMbuckconverter.Example7.HRPWMBuckConverterRun-TimeCode

EPWM1_BASE.set0x6800CMPAHR1.setEPWM1_BASE+0x8

;===============================================HRBUCK_DRV;(canexecutewithinanISRorloop);===============================================

MOVWDP,#_HRBUCK_InMOVLXAR2,@_HRBUCK_In;PointertoInputQ15Duty(XAR2)MOVLXAR3,#CMPAHR1;PointertoHRPWMCMPAreg(XAR3);OutputforEPWM1A(HRPWM)MOVT,*XAR2;T<=Duty

MPYUACC,T,@_hrbuck_period;Q15toQ0scalingbasedonPeriodMOVT,@_MEP_SF;MEPscalefactor(fromoptimizers/w)MPYUP,T,@AL;P<=T*AL,OptimizerscalingMOVH@AL,P;AL<=P,moveresultbacktoACCADDACC,#0x180;MEPrangeandroundingadjustmentMOVL*XAR3,ACC;CMPA:CMPAHR(31:8)<=ACC

;OutputforEPWM1B(RegularRes)Optional-forcomparisonpurposeonlyMOV*+XAR3[2],AH;StoreACCHtoregularCMPB

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OperationalDescriptionofHRPWM

2.5.2ImplementingaDACfunctionUsinganR+CReconstructionFilterInthisexample,thePWMrequirementsare:

•PWMfrequency=400kHz(i.e.TBPRD=250)•PWMmode=Asymmetrical,Up-count

•Resolution=14bits(MEPstepsize=150ps)

Figure10andFigure11showtheDACfunctionandtherequiredPWMwaveform.Asexplained

previously,configurationfortheePWM1moduleisalmostidenticaltothenormalcaseexceptthattheappropriateMEPoptionsneedtobeenabled/selected.

Figure10.SimpleReconstructionFilterforaPWMBasedDAC

EPWM1ALPFVOUT1

Figure11.PWMWaveformGeneratedforthePWMDACFunction

TPWM = 2.5 µSZCAZCAZEPWM1A

Theexamplecodeshownconsistsoftwomainparts:•Initializationcode(executedonce)

•Runtimecode(typicallyexecutedwithinanISR)

ThisexampleassumesatypicalMEP_SPanddoesnotusetheSFOlibrary.

Example8showstheInitializationcode.ThefirstpartisconfiguredforconventionalPWM.ThesecondpartsetsuptheHRPWMresources.

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OperationalDescriptionofHRPWM

Example8.PWMDACFunctionInitializationCode

voidHrPwmDacDrvCnf(void){

//ConfigforconventionalPWMfirst

EPwm1Regs.TBCTL.bit.PRDLD=TB_IMMEDIATE;EPwm1Regs.TBPRD=250;hrDAC_period=250;

//SetImmediateload

//Periodsetfor400kHzPWM//UsedforQ15toQ0scaling

EPwm1Regs.TBCTL.bit.CTRMODE=TB_COUNT_UP;EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE;//EPWM1istheMasterEPwm1Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_DISABLE;EPwm1Regs.TBCTL.bit.HSPCLKDIV=TB_DIV1;EPwm1Regs.TBCTL.bit.CLKDIV=TB_DIV1;

//Note:ChBisinitializedhereonlyforcomparisonpurposes,itisnotrequiredEPwm1Regs.CMPCTL.bit.LOADAMODEEPwm1Regs.CMPCTL.bit.SHDWAMODEEPwm1Regs.CMPCTL.bit.LOADBMODEEPwm1Regs.CMPCTL.bit.SHDWBMODE

====

CC_CTR_ZERO;CC_SHADOW;CC_CTR_ZERO;CC_SHADOW;

//optional//optional

EPwm1Regs.AQCTLA.bit.ZRO=AQ_SET;

EPwm1Regs.AQCTLA.bit.CAU=AQ_CLEAR;EPwm1Regs.AQCTLB.bit.ZRO=AQ_SET;EPwm1Regs.AQCTLB.bit.CBU=AQ_CLEAR;//NowconfiguretheHRPWMresourcesEALLOW;

EPwm1Regs.HRCNFG.all=0x0;

EPwm1Regs.HRCNFG.bit.EDGMODE=HR_FEP;EPwm1Regs.HRCNFG.bit.CTLMODE=HR_CMP;

EPwm1Regs.HRCNFG.bit.HRLOAD=HR_CTR_ZERO;EDIS;

MEP_SF=66*256;

//optional//optional

////////////////////

NotetheseregistersareprotectedandactonlyonChA.Clearallbitsfirst

ControlfallingedgepositionCMPAHRcontrolstheMEP.ShadowloadonCTR=Zero.

StartwithtypicalScaleFactorvaluefor100MHz.

UseSFOfunctionstoupdateMEP_SFdynamically.

}

Example9showsanassemblyexampleofrun-timecodethatcanexecuteinahigh-speedISRloop.

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OperationalDescriptionofHRPWM

Example9.PWMDACFunctionRun-TimeCode

EPWM1_BASECMPAHR1

.set.set

0x6800

EPWM1_BASE+0x8

;=================================================HRPWM_DAC_DRV;(canexecutewithinanISRorloop);=================================================

MOVWDP,#_HRDAC_InMOVLXAR2,@_HRDAC_In;PointertoinputQ15duty(XAR2)MOVLXAR3,#CMPAHR1;PointertoHRPWMCMPAreg(XAR3);OutputforEPWM1A(HRPWM)MOVT,*XAR2MPYACC,T,@_hrDAC_periodADDACC,@_HrDAC_period<<15MOVT,@_MEP_SFMPYUP,T,@ALMOVH@AL,PADDACC,#0x180MOVL*XAR3,ACC

;;;;;;;;

T<=duty

Q15toQ0scalingbasedonperiodOffsetforbipolaroperation

MEPscalefactor(fromoptimizers/w)P<=T*AL,optimizerscalingAL<=P,moveresultbacktoACCMEPrangeandroundingadjustmentCMPA:CMPAHR(31:8)<=ACC

;OutputforEPWM1B(RegularRes)Optional-forcomparisonpurposeonly

MOV*+XAR3[2],AH;StoreACCHtoregularCMPB

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HRPWMRegisterDescriptions

3HRPWMRegisterDescriptions

ThissectiondescribestheapplicableHRPWMregisters

3.1RegisterSummary

AsummaryoftheregistersrequiredfortheHRPWMisshowninTable8.Table8.RegisterDescriptions

Name

TimeBaseRegistersTBCTLTBSTSTBPHSHRTBPHSTBCNTTBPRDReserved

CompareRegistersCMPCTLCMPAHRCMPACMPB

EPWMRegistersePWMHRCNFGReserved

0x0000to0x001F0x00200x00300x003F

32116

OtherePWMregistersincludingtheonesgivenabove.HRPWMConfigurationRegister

0x00070x00080x00090x000A

1/01/11/11/1

CounterCompareControlRegister

CounterCompareAHighResolutionRegisterSetCounterCompareARegisterSetCounterCompareBRegisterSet[4]

0x00000x0001TBPHSHR0x00030x00040x00050x0006

1/01/01/01/01/01/11/0

TimeBaseControlRegisterTimeBaseStatusRegister

TimeBasePhaseHighResolutionRegisterTimeBasePhaseRegisterTimeBaseCounterRegisterTimeBasePeriodRegisterSet[3]

Offset

Size(x16)

Description

EPWM/HRPWMTestRegisters

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HRPWMRegisterDescriptions

3.2RegistersandFieldDescriptions

Figure12.HRPWMConfigurationRegister(HRCNFG)

ReservedR-0

3HRLOADR/W-0

2CTLMODER/W-0

EDGMODER/W-0

LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset

Table9.HRPWMConfigurationRegister(HRCNFG)FieldDescriptions

Bit15-43

FieldReservedHRLOAD

ValueDescription(1)

Reserved

Shadowmodebit:SelectsthetimeeventthatloadstheCMPAHRshadowvalueintotheactiveregister:CTR=ZRO(counterequalzero)CTR=PRD(counterequalperiod)

Note:LoadmodeselectionisvalidonlyifCTLMODE=0hasbeenselected(bit2).YoushouldselectthiseventtomatchtheselectionoftheCMPAloadmode(i.e.,CMPCTL[LOADMODE]bits)intheEPWMmoduleasfollows:00011011

CTLMODE

1-0

EDGMODE

00011011

(1)

LoadonCTR=Zero:Time-basecounterequaltozero(TBCTR=0x0000)LoadonCTR=PRD:Time-basecounterequaltoperiod(TBCTR=TBPRD)LoadoneitherCTR=ZeroorCTR=PRD(shouldnotbeusedwithHRPWM)Freeze(noloadspossible–shouldnotbeusedwithHRPWM)

ControlModeBits:Selectstheregister(CMPorTBPHS)thatcontrolstheMEP:

CMPAHR(8)Registercontrolstheedgeposition(i.e.,thisisdutycontrolmode).(defaultonreset)TBPHSHR(8)Registercontrolstheedgeposition(i.e.,thisisphasecontrolmode).

EdgeModeBits:SelectstheedgeofthePWMthatiscontrolledbythemicro-edgeposition(MEP)logic:HRPWMcapabilityisdisabled(defaultonreset)MEPcontrolofrisingedgeMEPcontroloffallingedgeMEPcontrolofbothedges

ThisregisterisEALLOWprotected.

Figure13.CounterCompareAHighResolutionRegister(CMPAHR)

CMPAHRR/W-0

LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset

ReservedR/W-0

Table10.CounterCompareAHighResolutionRegister(CMPAHR)FieldDescriptions

Bit15-87-0

FieldCMPAHRReserved

ValueDescription

CompareAHighResolutionregisterbitsforMEPstepcontrol.Aminimumvalueof0x0001isneededtoenableHRPWMcapabilities.ValidMEPrangeofoperation1-255h.

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Figure14.TBPhaseHighResolutionRegister(TBPHSHR)

TBPHSHR/W-0

LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset

ReservedR/W-0

Table11.TBPhaseHighResolutionRegister(TBPHSHR)FieldDescriptions

Bit15-87-0

FieldTBPHSHReserved

Value

Description

Timebasephasehighresolutionbits

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AppendixA

AppendixARevisionHistory

ThisdocumentwasrevisedtoSPRU924BfromSPRU924A.Thisappendixlistsonlyrevisionsmadeinthemostrecentversion.ThescopeoftherevisionswaslimitedtotechnicalchangesasshowninTableA-1.TableA-1.ChangesMadeinRevisionB

LocationGlobalFigure1Section2.3.3Table5Section2.4Section2.4.1AppendixBAdditions,Deletions,ModificationsAddedTMS320F2833xdeviceinformation

ModifiedResolutionCalculationsforConventionallyGeneratedPWMfigureModifiedtheDutyCycleRangeLimitationsection

ModifiedDutyCycleRangeLimitationfor3and6SYSCLK/TBCLKCyclestableModifiedtextandtableinsectiononScaleFactorOptimiizingSoftware(SFO)Modifiedsectiononsoftwareusage

AddedinformationontheSFOLibrarySoftwareasAppendixB30RevisionHistory

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AppendixB

AppendixBSFOLibrarySoftware-SFO_TI_Build_V5.lib

ThisappendixincludesadetaileddescriptionofthesoftwareroutinesinSFO_TI_Build_V5.lib,whichsupportsupto16HRPWMchannels

B.1SFOLibraryVersionComparison

TableB-1includesahigh-levelcomparisonbetweenSFO_TI_Build.libandSFO_TI_Build_V5.lib.A

detaileddescriptionofSFO_TI_Build_V5.libfollowsthetable,andmoreinformationonSFO_TI_Build.libcanbefoundinSection2.4.TableB-1.SFOLibraryVersionComparison

ePWMFreq

Max.HRPWMchannelssupported

Totalstaticvariablememorysize

MepEnrunsonmultiplechannelsconcurrently?Error-checking?TypicaltimerequiredforMepEntoupdate

MEP_ScaleFactoron1channelifcalledrepetitivelywithout

interrupts(SYSCLKOUT=100MHz)

3.33MHz400kHz1MHz2MHz20MHz

---SFO_TI_Build.lib

Upto4220YesNo0.3963.261.3080.660.066

SFO_TI_Build_V5.lib

Upto16

79(1ch.)to192(16ch.)

NoYes0.181.50.60.30.03

Unitchannelswords1--secondssecondssecondssecondsseconds

InSFO_TI_Build_V5.lib,thediagnosticsoftwarehasbeenoptimizedtouselessmemory,tominimizethecalibrationtime,andtosupportupto16HRPWMchannels.Table9providesfunctionaldescriptionofthetwoSFOlibraryroutinesinSFO_TI_Build_V5.lib.

Note:

SFO_TI_Build_V5.liblibraries.TheSFOfunctionsinthefpu-versionlibrariesareC-code-compatibletotheirfixed-pointequivalents.

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TableB-2.SFOV5LibraryRoutines

Function

intSFO_MepDis_V5(n)

Description

ScaleFactorOptimizerV5withMEPDisabled

ThisroutineisverysimilartotheSFO_MepDis()routineintheoriginalSFOlibrary,butwithonechange.Itnowreturnsa1whenMEPdisabledcalibrationiscomplete,ora0whilecalibrationisstillrunning.

ThisfunctionrunsfasterthantheSFO_MepEn_V5()routineandcannotbeusedonanePWMchannelwhileHRPWMcapabilitiesareenabledforthatchannel.IfthereisaspareePWMchannelavailableinthesystem,SFO_MepDis_V5()canberunforthatchannel,andtheresultingMEP_ScaleFactor[n]valuecanbecopiedintotheMEP_ScaleFactor[n]forallotherchannels.BecausetheMEPstepbehaviorinaparticularpieceofsiliconissimilaronallHRPWMchannelswithregardtotemperatureandvoltage,usingonededicatedHRPWMchannelforcalibrationbycallingtheSFO_MepDis_V5functionwillreducesoftwareoverhead.

IfSYSCLKOUT=TBCLK=100MHzandassumingtheMEPstepsizeis150ps:

Typicalvalueat100MHz=66MEPstepsperunitTBCLK(10ns)

Thefunctionreturnsavalueinthevariablearray:

MEP_ScaleFactor[n]=NumberofMEPsteps/SYSCLKOUT

IfTBCLKisnotequaltoSYSCLKOUT,thenthereturnedvaluemustbeadjustedtoreflectthecorrectTBCLK:

MEPstepsperTBCLK=MEP_ScaleFactor[n]*(SYSCLKOUT/TBCLK)

Example:IfTBCLK=SYSCLKOUT/2,

MEPstepsperTBCLK=MEP_ScaleFactor[n]*(100/50)=66*2=132

Constraintswhenusingthisfunction:

•SFO_MepDis_V5(n)canbeusedwithSYSCLKOUTfrom50MHzto100MHz(ormaximumSYSCLKfrequency).MEPdiagnosticslogicusesSYSCLKOUTandnotTBCLK.Hence,theSYSCLKOUTrestrictionisanimportantconstraint.

•IfTBCLKdoesnotequalSYSCLKOUT,theTBCLKfrequencymustbegreatenoughsothatMEPstepsperTBCLKdonotexceed255.Thisisduetotherestrictionthattherecanbenomorethan255MEPstepsinacoarsestep.

•ThisfunctioncannotberunonanePWMchannelwithHRPWMcapabilitiesenabled.Usage:

•IfoneoftheePWMmodulesisrunninginnormalePWMmode,thenitcanbeusedtoruntheSFOdiagnosticsfunction.Here,thesingleMEP_ScaleFactorvalueobtainedforthatchannelcanbecopiedandusedastheMEP_ScaleFactorfortheotherePWMmoduleswhicharerunningHRPWMmode.ThisassumesthatallHRPWMmodules'MEPstepsaresimilarbutmaynotbeidentical.

•Thisroutinereturnsa1whencalibrationisfinishedonthespecifiedchannelora0ifcalibrationisstillrunning.

•TheePWMmodulethatisnotactiveinHRPWMmodeisstillfullyoperationalinconventionalPWMmodeandcanbeusedtodrivePWMpins.TheSFOfunctiononlymakesuseoftheMEPdiagnosticslogicintheHRPWMcircuitry.

•SFO_MepDis_V5(n)functiondoesnotrequireastartingScaleFactorvalue.

•TheotherePWMmodulesoperatinginHRPWMmodeincuronlya3-cycleminimumdutycyclelimitation.

intSFO_MepEn_V5(n)

ScaleFactorOptimizerV5withMEPEnabled

ThisfunctionrunsslowerthantheSFO_MepDis_V5()routineandrunsSFOdiagnosticsonanePWMchannelwithHRPWMcapabilitiesenabledforthatchannel.

IfSYSCLKOUT=TBCLK=100MHz,andassumingMEPstepsizeis150ps:

Typicalvalueat100MHz=66MEPstepsperunitTBCLK(10ns)

Thefunctionreturnsavalueinthevariablearray:

MEP_ScaleFactor[n]

=NumberofMEPsteps/SYSCLKOUT=NumberofMEPsteps/TBCLK

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SFOLibraryVersionComparison

TableB-2.SFOV5LibraryRoutines(continued)

Function

Description

Constraintswhenusingthisfunction:

•Thisroutinemustberunononechannelatatimeandcannotberunonmultiplechannels

concurrently.WhenithasfinishedupdatingtheMEP_ScaleFactorforachannel,itwillreturna1.Ifitisstillcalibrating,itwillreturna0.AbackgroundloopshouldexistintheusercodewhichcallsSFO_MepEn_V5(n)repetitivelyuntilitreturnsa1.Thenthefunctioncanbecalledforthenextchannel.(1)

Note:

UnliketheoriginalSFO_MepEn(n)routine,thisroutinecannotrunonmultiplechannelsconcurrently.

DonotcallSFO_MepEn_V5(n)foranotherchanneluntilthefunctionreturnsa1forthecurrentchannel.Otherwise,theMEP_ScaleFactorforbothchannelswillbecomecorrupted.

•TheSFO_MepEn_V5(n)functionisrestrictedtobeusedwithaSYSCLKOUTbetween60MHzand100MHz(ormaximumSYSCLKfrequency)only.MEPdiagnosticslogicusesSYSCLKOUTandnotTBCLK.Hence,theSYSCLKOUTrestrictionisanimportantconstraint.Usage:

•TheSFO_MepEn_V5(n)functionrequiresastartingscalefactorvalue,MEP_ScaleFactor[0].MEP_ScaleFactor[0]needstobeinitializedtoatypicalMEPstepsizevalue.Todothis,

SFO_MepDis_V5(n)canberunonanePWMchannelwhiletheHRPWMisdisabled,andtheresultingMEP_ScaleFactor[n]valuecanbecopiedintoMEP_ScaleFactor[0].

•Iftherearedrasticenvironmentalchangestoyoursystem(i.e.temperature/voltage),itis

generallyagoodideatore-seedMEP_ScaleFactor[0]withanewtypicalMEPstepsizevalueforthechangedconditions.

•BecauseSFO_MepEn_V5(n)canberunononlyonechannelatatime,itisonlyrecommendedforsystemswheretherearenospareHRPWMchannelsavailable,soSFOcalibrationmustbeperformedonallchannelswithHRPWMcapabilitiesenabled.Inthiscase,a6-cycleMEPinactivityzoneexistsatthestartofeachPWMperiodonallHRPWMchannels.SeeSection2.3.3ondutycyclerangelimitation.•Thefunctionreturns:

–AonewhenithasfinishedSFOcalibrationforthecurrentchannel–AzerowhenSFOdiagnosticsarestillrunningforthechannel

–Atwoasanerrorindicatoraftercalibrationhascompletediftheresulting

MEP_ScaleFactorforthechanneldiffersfromtheoriginalMEP_ScaleFactor[0]seedvaluebymorethan+/-15.

Thefunctionmustbecalledrepetitivelybeforeitwillreturna1.ThistakesalongertimetocompletethantheSFO_MepDis_V5(n)calibration.

Ifitreturnsa2,theMEP_ScaleFactorforthechannelhasfinishedupdatingandisoutsidethe

typicaldriftrangeofMEP_ScaleFactor[0]+/-15evenwithlargetemperatureandvoltagevariations.Ifthereasonforthelargedifferencebetweentheseedandthechannelscalefactorisknownandacceptable,theusermaychoosetoignorethereturnof2,andtreatitasareturnvalueof1,indicatingthatcalibrationiscomplete.

Otherwise,ifthelargedifferenceisunexpected,therearestepstotaketoremedytheerror:1.

CheckyourcodetoensureSFO_MepEn_V5(n)isnotbeingcalledonmorethanonechannelatatime.

2.Iftheaboveisnoteffective,runSFO_MepDis_V5(n)againandre-seedMep_ScaleFactor[0].3.Ifneitheroftheabove2stepswork,theremaybeasystemproblem.Theapplicationfirmware

shouldperformashutdownoranappropriaterecoveryprocedure.

•IfallePWMmodulesareusingthesameTBCLKprescaler,thenitispossibletorunthe

SFO_MepEn_V5(n)functionforonlyoneePWMmoduleandtousetheMEP_ScaleFactorvalueforthatmodulefortheothermodulesalso.InthiscaseonlyoneePWMmoduleincursthe

6-cycledutylimitation,andtheremainingmodulesincuronlya3-cycleminimumdutylimitation.ThisassumesthatallHRPWMmodules'MEPstepsaresimilarbutmaynotbeidentical.

(1)

IfSFOcalibrationmustberunonmultiplechannelsatatimewhileHRPWMcapabilitiesareenabled,thepreviousversionoftheSFOlibrary,SFO_TI_Build.lib,whichusesmorememoryresources,canbeusedinstead,andSFO_MepEn(n)canrunconcurrentlyforupto4ePWMchannelswithHRPWMenabled.

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SoftwareUsage

B.2SoftwareUsage

SoftwarelibraryfunctionsintSFO_MepEn_V5(intn)andintSFO_MepDis_V5(intn)calculatetheMEPscalefactorforePWMnmodules,wheren=theePWMchannelnumber.Thescalefactorvalue,whichrepresentsthenumberofmicro-stepsavailableinasystemclockperiod,isreturnedinaglobalarrayofintegervaluescalledMEP_ScaleFactor[x],wherexisthemaximumnumberofHRPWMchannelsforadeviceplusone.Forexample,ifthemaximumnumberofHRPWMchannelsforadeviceis16,thescalefactorarraywouldbeMEP_ScaleFactor[17].BothSFO_MepEn_V5andSFO_MepDis_V5themselvesalsoreturna1whencalibrationhascompleted,indicatingtheMEP_ScaleFactorhasbeensuccessfullyupdatedforthechannel,anda0whencalibrationisstillon-going.Areturnof2representsanout-of-rangeerror.

TableB-3.SoftwareFunctions

SoftwarefunctionalcallsintSFO_MepDis_V5(intn)

(1)

FunctionalDescription

ThescalefactorinMEP_ScaleFactor[1]isupdatedwhenstatus=1.ThescalefactorinMEP_ScaleFactor[2]isupdatedwhenstatus=1....

ThascalefactorinMEP_ScaleFactor[16]isupdatedwhenstatus=1or2.ThescalefactorinMEP_ScaleFactor[1]isupdatedwhenstatus=1or2.ThescalefactorinMEP_ScaleFactor[2]isupdatedwhenstatus=1or2....

ThescalefactorinMEP_ScaleFactor[16]isupdatedwhenstatus=1or2.

status=SFO_MepDis_V5(1)status=SFO_MepDis_V5(2)

...

status=SFP_MepDis_V5(16)intSFO_MepEn_V5(intn)(1)status=SFO_MepEn_V5(1);status=SFO_MepEn_V5(2);

...

status=SFO_MepEn_V5(16);

(1)

MEP_ScaleFactor[0]isastartingseedvalueusedbytheSFOsoftwarefunctionsinternally.

TousetheHRPWMfeatureoftheePWMs,itisrecommendedthattheSFOfunctionsinTI_Build_V5.libbeusedasdescribedhere.TheexamplesbelowarespecifictotheTMS320F28044device,whichincludesamaximumof16HRPWMchannels.FordifferentdeviceswhichmayhavefewerHRPWMchannels,modificationswillberequiredinStep1andStep2below.Step1.AddIncludeFiles

TheSFO_V5.hfileneedstobeincludedasfollows.ThisincludefileismandatorywhenusingtheSFOV5libraryfunctions.FortheTMS320F28044device,theC2804xC/C++HeaderFilesandPeripheral

Examples(literaturenumberSPRC324)DSP2804x_Device.handDSP2804x_PWM_defines.hfilesarenecessaryaswell,astheyareusedbyallTIsoftwareexamplesforthedevice.Thesefilenameswill

changeinaccordancewithyourspecificdevice.Theseincludefilesareoptionalifcustomizedheaderfilesareusedintheendapplication.SeeExampleB-1.ExampleB-1.ASampleofHowtoAddIncludeFiles

#include“DSP2804x_Device.h”

#include“DSP2804x_EPWM_defines.h#include“SFO_V5.h”

//DSP2804xHeaderfile//initdefines

//SFOV5libfunctions(neededforHRPWM)

Step2.DefineNumberofHRPWMChannelsUsed

IntheSFO_V5.hfile,themaximumnumberofHRPWM'susedforaparticulardevicemustbedefined.PWM_CHmustequalthenumberofHRPWMchannelsplusone.Forinstance,fortheTMS320F28044,wherethereare16possibleHRPWMchannels,PWM_CHcanbesetto17.FortheTMS320F2809,wherethereare6possibleHRPWMchannels,PWM_CHcanbesetto7.SeeExampleB-2.34SFOLibrarySoftware-SFO_TI_Build_V5.lib

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SoftwareUsage

Tosavestaticvariablememory,fewerthanthemaximumnumberofHRPWMchannelsmaybedefinedwithsomecaution.Todothis,PWM_CHcanbesettothelargestePWMchannelnumberplusone.Forinstance,ifonlyePWM1AandePWM2AchannelsarerequiredasHRPWMchannels,PWM_CHcanbesetto3.However,ifonlyePWM15AandePWM16AchannelsarerequiredasHRPWMchannels,PWM_CHmuststillbesetto17.

ExampleB-2.DefiningNumberofHRPWMChannelsUsed(PlusOne)

//SFO_V5.H

//NOTE:THISISAVERYIMPORTANTSTEP.PWM_CHMUSTBEDEFINEDFIRSTBEFORE//BUILDINGCODE.#definePWM_CH17//

//////

F28044hasaForadeviceForadeviceForadevice

maximumof16HRPWMwithamaximumof6withamaximumof4withamaximumof3

channels(17=16+1)

HRPWMchannels,PWM_CH=7HRPWMchannels,PWM_CH=5HRPWMchannels,PWM_CH=4

Step3.ElementDeclaration

DeclareanarrayofintegervariableswithalengthequaltoPWM_CH,andanarrayofpointerstoEPWMregisterstructures.Thearrayofpointerswillincludepointersforupto16EPWMregisterstructuresplusonedummypointerinlocationEPWM[0]foradevicewith16EPWMchannels.Likewise,itwillincludepointersforupto4EPWMregisterstructuresplusoneforadevicewith4EPWMregistersandupto3EPWMregisterstructuresplusoneforadevicewith3EPWMregisters.ExampleB-3.DeclaringElementsRequiredbySFO_TI_Build_V5.lib

intMEP_ScaleFactor[PWM_CH]={0,0,0,0,0,//

0,0,0,0,//0,0,0,0,//0,0,0,0};//

ScalefactorvaluesforePWM1-16andMEP_ScaleFactor[0]

ForfewerHRPWMchannels,therewillbefewerzerosinitialized.

//DeclareavolatilearrayofpointerstoEPWMRegisterstructures.

//Onlypointtoregistersthatexist.Ifadevicehasonly6EPWMs(PWM_CHis7),//thearraywillincludepointersforupto6EPWMregisterstructuresplusone//dummypointerintheePWM[0]location.

volatilestructEPWM_REGS*ePWM[PWM_CH]{&EPwm1Regs,&EPwm1Regs,&EPwm2Regs,&EPwm3Regs,&EPwm4Regs,&EPwm5Regs,&EPwm6Regs,&EPwm7Regs,&EPwm8Regs,&EPwm9Regs,&EPwm10Regs,&EPwm11Regs,&EPwm12Regs,&EPwm13Regs,&EPwm14Regs,&EPwm15Regs,&EPwm16Regs};

Step4.MEP_ScaleFactorInitialization

Afterpowerup,theSFO_MepEn_V5(n)functionneedsatypicalscalefactorstartingseedvaluein

MEP_ScaleFactor[0].ThisvaluecanbeconvenientlydeterminedusingoneoftheePWMmodulestoruntheSFO_MepDis_V5(n)functionpriortoinitializingthePWMsettingsfortheapplication.TheSFO_MepDis_V5(n)functiondoesnotrequireastartingscalefactorvalue.Aspartoftheone-timeinitializationcode,includethecodeinExampleB-4.ExampleB-4.InitializationWithaScaleFactorValue

//MEP_ScaleFactorvariablesinitializedusingfunctionSFO_MepDis_V5Uint16i;

for(i=1;iwhile(SFO_MepDis_V5(i)==0);//CallsMepDisuntilMEP_ScaleFactorupdated}

//InitializeMEP_ScaleFactor[0]withatypicalMEPseedvalue//requiredforSFO_MepEn_V5

MEP_ScaleFactor[0]=MEP_ScaleFactor[1];

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SoftwareUsage

Step5.ApplicationCode

Whiletheapplicationisrunning,fluctuationsinbothdevicetemperatureandsupplyvoltagemaybe

expected.TobesurethatoptimalscalefactorsareusedforeachePWMmodule,theSFOfunctionshouldbere-runperiodicallyaspartofaslowerbackgroundloop.SomeexamplesofthisareshownhereinExampleB-5.ExampleB-5.SFOFunctionCalls

main(){

Uint16current_ch=1;//keepstrackofcurrentHRPWMchannelbeingcalibratedUint16status;//////

Usercode

Case1:AllePWMsarerunninginHRPWMmode

Here,theminimumdutycyclelimitationis6clockcycles.

status=SFO_MepEn_V5(current_ch);//MepEncalledhereif(status==1)//ifMEP_ScaleFactorhasbeenupdated{

current_ch++;//moveontothenextchannel}

elseif(status==2){

error();}

if(current_ch==PWM_CH){

current_ch=1;}

//////////////

//ifMEP_ScaleFactordiffersfrom

//MEP_ScaleFactor[0]seedbymorethan//+/-15,flaganerror

//iflastchannelhasbeenreached//gobacktochannel1

Case2:allePWMsexceptonearerunninginHRPWMmode.

OneoftheePWMchannels(ePWM16inthisexample)isusedforSFO_MepDis_V5scalefactorcalibration.

Here,theminimumdutycyclelimitationis3clockcycles.

HRPWM16diagnosticscircuitryisusedtoestimatetheMEPstepswiththeassumptionthatallHRPWMchannelsbehavesimilarlythoughtheymaynotbeidentical.

while(SFO_MepDis_V5(16)==0);//waituntilMEP_ScaleFactor[16]updatedfor(i=1;i<(PWM_CH-1);i++)//UpdatescalefactorsforePWM1-15.{

MEP_ScaleFactor[i]=MEP_ScaleFactor[16];

Note:

Seethehrpwm_sfo_v5exampleinyourdevice-specificHeaderFilesandPeripheralExamplessoftwarepackageavailableontheTIwebsite.

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